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Publications

Found 3 results
Author Title Type [ Year(Desc)]
Filters: Keyword is Software libraries  [Clear All Filters]
2005
B. P. Harish, Patil, M. B. , and Bhat, N. , Modeling of the Effects of Process Variations on Circuit Delay at 65nm, in 2005 IEEE Conference on Electron Devices and Solid-State Circuits, 2005, pp. 761-764.
2007
B. P. Harish, Bhat, N. , and Patil, M. B. , On a Generalized Framework for Modeling the Effects of Process Variations on Circuit Delay Performance Using Response Surface Methodology, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, pp. 606-614, 2007.
B. P. Harish, Bhat, N. , and Patil, M. B. , Process Variability-Aware Statistical Hybrid Modeling of Dynamic Power Dissipation in 65 nm CMOS Designs, in Computing: Theory and Applications, 2007. ICCTA '07. International Conference on, 2007, pp. 94-98.