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Publications

Found 7 results
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H
T. H. Hung, Park, P. S. , Krishnamoorthy, S. , Nath, D. N. , Bajaj, S. , and Rajan, S. , “Lateral energy band engineering of Al2O3/III-nitride interfaces”, in 72nd Device Research Conference, 2014, pp. 131-132.
M
K. Majumdar, Konjady, R. S. , Suryaprakash, R. T. , and Bhat, N. , “Underlap Optimization in HFinFET in Presence of Interface Traps”, IEEE Transactions on Nanotechnology, vol. 10, pp. 1249-1253, 2011.
A. Medury, Mercha, K. , Ritzenthaler, R. , De Keersgieter, A. , Chiarella, T. , Collaert, N. , Bhat, N. , and Bhat, K. N. , “Device scaling model for bulk FinFETs”, in 2012 13th International Conference on Ultimate Integration on Silicon (ULIS), 2012, pp. 113-116.
A. S. Medury, Majumdar, K. , Bhat, N. , and Bhat, K. N. , “Modeling the threshold voltage of ultra-thin-body(UTB) long channel symmetric double-gate (DG) MOSFETs”, in Semiconductor Device Research Symposium, 2009. ISDRS '09. International, 2009, pp. 1-2.
V. Mishra, Ananthasuresh, G. K. , Bhat, N. , Nageswari, K. , Contractor, A. Q. , Kottantharayil, A. , Jamadagni, H. S. , Mohan, S. , Murthy, T. , Pratap, R. , Pinto, R. , Rao, V. R. , Vasi, J. M. , Shivashankar, S. A. , Venkataraman, V. , and Vinoy, K. J. , “Indian Nanoelectronics Users Program: An Outreach Vehicle to Expedite Nanoelectronics Research in India”, in 2010 18th Biennial University/Government/Industry Micro/Nano Symposium, 2010, pp. 1-5.
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J. K. Reddy., Malhi, C. K. , Pratap, R. , and Bhat, N. , “Coupled numerical analysis of Suspended gate field effect transistor (SGFET)”, in Physics and Technology of Sensors (ISPTS), 2012 1st International Symposium on, 2012, pp. 141-144.
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R. Srinivasan and Bhat, N. , “Impact of channel engineering on unity gain frequency and noise-figure in 90nm NMOS transistor for RF applications”, in 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design, 2005, pp. 392-396.