BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//CeNSE - ECPv6.15.17.1//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-ORIGINAL-URL:https://www.cense.iisc.ac.in
X-WR-CALDESC:Events for CeNSE
REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
X-PUBLISHED-TTL:PT1H
BEGIN:VTIMEZONE
TZID:Asia/Kolkata
BEGIN:STANDARD
TZOFFSETFROM:+0530
TZOFFSETTO:+0530
TZNAME:IST
DTSTART:20240101T000000
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20251027T090000
DTEND;TZID=Asia/Kolkata:20251104T170000
DTSTAMP:20260419T223049
CREATED:20250730T105338Z
LAST-MODIFIED:20250730T105338Z
UID:8759-1761555600-1762275600@www.cense.iisc.ac.in
SUMMARY:Advanced Training Program on Semiconductor Fabrication & Characterization
DESCRIPTION:
URL:https://www.cense.iisc.ac.in/event/advanced-training-program-on-semiconductor-fabrication-characterization-5/
LOCATION:CeNSE\, IISc\, Bengaluru
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20251107T160000
DTEND;TZID=Asia/Kolkata:20251107T170000
DTSTAMP:20260419T223049
CREATED:20251028T072045Z
LAST-MODIFIED:20251028T072122Z
UID:9477-1762531200-1762534800@www.cense.iisc.ac.in
SUMMARY:[Seminar] : Scalable Synthesis and Device Integration of van der Waals Materials for Next-Generation Electronics
DESCRIPTION:Speaker: Prof. Sunkook Kim\, Associate Professor\, Department of Advanced Materials Science\n& Engineering\, Sungkyunkwan University (SKKU).\n\nTitle: "Scalable Synthesis and Device Integration of van der Waals Materials \nfor Next-Generation Electronics"\n\nDate: Friday\, November 7\, 2025 - Time: 4 PM\n\nHi-Tea & Coffee: 5 PM\n\nVenue: CeNSE Seminar Hall\n\nAbstract:\n\nVan der Waals (vdW) materials\, with their unique layered structures and atomically thin profiles\, \nare attracting significant attention for next-generation electronics and optoelectronics. \nTheir tunable physical properties—such as bandgap\, carrier mobility\, and optical absorption—make \nthem ideal for use in a wide range of high-performance devices. Recent progress in scalable synthesis \ntechniques\, including chemical vapor deposition (CVD) and molecular beam epitaxy (MBE)\, has enabled \nthe fabrication of high-quality 2D materials like graphene\, MoS₂\, and hexagonal boron nitride (h-BN).\n\nIn this seminar\, Professor Sunkook Kim from Sungkyunkwan University will present recent advances \nin the controlled synthesis and device integration of vdW materials. The talk will explore how \nheterostructures formed by stacking different 2D layers can be engineered to develop novel \ndevices such as field-effect transistors (FETs)\, broadband photodetectors\, and neuromorphic \nsystems. Emphasis will be placed on interface control\, defect engineering\, and the scalable \nfabrication of functional arrays.\n\nThe seminar will also highlight emerging directions such as three-dimensional integration \nand system-level applications of vdW materials in semiconductor technologies. This presentation \naims to provide insights into both the fundamental and applied aspects of 2D materials\, \noffering a glimpse into their potential for future device innovations.\n\nBiography:\n\nProf. Sunkook Kim is an Associate Professor in the Department of Advanced Materials Science \n& Engineering\, Sungkyunkwan University (SKKU). He earned his Ph.D in Electrical and Computer \nEngineering at Purdue University in 2009\, and worked in Intel and Samsung Electronics in 2012. \nHis research interests include a large-area synthesis of 2D materials\, high-mobility thin-film \ntransistors\, wearable electronics and human-digital interactive sensors. He received the Young \nScientist Award from Korean President in 2015 and Display Challenger Award (Foldable OLED Display)\n from Samsung Electronics in 2010. He is currently involved in editorial work for the Journal of\n Alloy and Compounds and NPJ Communications Materials\, Materials Today Electronics\, and Discovery Nano.\n\nHost Faculty: Prof. Pavan Nukala.
URL:https://www.cense.iisc.ac.in/event/seminar-scalable-synthesis-and-device-integration-of-van-der-waals-materials-for-next-generation-electronics/
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20251110T090000
DTEND;TZID=Asia/Kolkata:20251118T170000
DTSTAMP:20260419T223049
CREATED:20250730T105422Z
LAST-MODIFIED:20250730T105422Z
UID:8761-1762765200-1763485200@www.cense.iisc.ac.in
SUMMARY:Advanced Training Program on Semiconductor Fabrication & Characterization
DESCRIPTION:
URL:https://www.cense.iisc.ac.in/event/advanced-training-program-on-semiconductor-fabrication-characterization-6/
LOCATION:CeNSE\, IISc\, Bengaluru
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20251110T110000
DTEND;TZID=Asia/Kolkata:20251110T113000
DTSTAMP:20260419T223049
CREATED:20251103T091239Z
LAST-MODIFIED:20251103T091239Z
UID:9581-1762772400-1762774200@www.cense.iisc.ac.in
SUMMARY:[Seminar] : GeSn: a group-IV materials platform for quantum devices
DESCRIPTION:Speaker: Prof. Giorgos Fagas\, Director of Strategic Development\, Tyndall.\n\nTitle: "GeSn: a group-IV materials platform for quantum devices"\n\nDate: Monday\, November 10\, 2025 - Time: 11 AM\n\nVenue: CeNSE Seminar Hall\n\nAbstract:\n\nThere are several proposed platforms for realising quantum devices and more specifically \nqubits\, the basic units of quantum information processing\, to perform quantum computation. \nWhile there has been great scientific progress and proof-of-concept demonstrations on all \nthese platforms\, to address the challenge of scalability it makes sense to use all the \nmachinery of traditional semiconductors. For example\, charge or spin-qubits can be realised\n by using gate-defined quantum dots (QDs) in semiconductors in a similar fashion to the \nprocesses used in CMOS for conventional field-effect transistors (FETs) or state-of-the-art \nfinFET technology. In the last few years\, Ge has progressed immensely from a conceptually \nnew material for qubits to demonstrations of two-qubit logic and most recently the first \ndemonstration of a four-qubit quantum processor. Furthermore\, the GeSn alloy is a material \nplatform that carries the promise of highly desirable extreme mobility\, low effective mass \nand added optical control for the qubit manipulation.\n\nIn this talk\, I will provide an overview of the recent developments of Ge-based platforms \nsuch as epi-grown and strained Ge and GeSn layers on Si for hosting hole-based qubits\, \nand further discuss challenges related to Ge processing modes for realising qubit devices. \nThe device architectures we discuss are analogous to conventional planar and fin-FET \ndevices with enlarged number of gates controlling the definition of the quantum dots \nin the Ge/GeSn channel. The processing modes are related to the use of electron beam \nlithography (EBL)\, reactive ion etching (RIE) and atomic layer deposition (ALD) of gate \nmaterials (gate oxide and TiN metal). The aim is to understand high fidelity/resolution \ngates patterning\, as well as various surface passivation (pre-treatments) for the ALD \ngate oxides (AlOx\, HfO and ZrOx) formation\, the quality of the interfaces and dielectrics used. \nFinally\, I will discuss the application of the GeSn materials platform as a highly sensitive \ncharge sensor in a single-electron transistor (SET) configuration.\n\nBiography:\n\nProfessor Giorgos Fagas (PhD\, MBA) serves as the Director of Strategic Development at \nthe Tyndall National Institute and is a member of its Executive Leadership team. In this \ncapacity\, he is responsible for shaping the institute's overall international positioning\, \ninitiating and overseeing major strategic initiatives that span the entire institute\, and \nmanaging the collective strategic planning process. Giorgos also ensures the effective delivery\n of Tyndall's strategic plan\, driving the institute towards its long-term objectives.\n\nA key part of Giorgos’s remit is Tyndall’s international profile. He is actively involved in \nseveral influential policy and industry groups\, both within Ireland and across Europe. These \ninclude serving as the Europe Chair for the Industry Association for Microelectronics and \nElectronic Systems Design in Ireland (MIDAS)\, holding a directorship at the SiNANO Institute\, \nand being a member of the Executive Committee of EPoSS and the AENEAS Scientific Council. His \nacademic contributions extend globally as well\, holding an adjunct professorship at the Centre \nfor Nanoscience and Engineering (CeNSE) at the Indian Institute of Science (IISc).\n\nGiorgos holds a PhD in Physics from Lancaster University\, UK\, awarded in 2000\, and an executive \nMBA from University College Cork\, Ireland\, completed in 2012. Previously\, Giorgos led the CMOS++ \nprogramme at Tyndall\, which comprised around 50 researchers. This strategic programme focused on \nemerging materials\, devices\, and architectures for next-generation information processing\, \nparticularly in relation to interfacing with CMOS technology and exploring possibilities beyond it. \nHis own research group\, the Quantum Electronic Device Group (QED)\, is highly interdisciplinary\, \ncombining expertise from physics\, chemistry\, materials science\, electrical engineering\, and \ntheoretical modelling and simulation. The group’s aim is to engineer emerging material platforms \nand develop new devices for scalable quantum computer architectures.\n\nGiorgos has played a significant role in aligning and securing resources for the launch and \nsustainability of the Tyndall Quantum Computer Engineering Centre\, the first dedicated programme \nof its kind in Ireland aimed at advancing quantum science. He has also led Tyndall’s successful \ninvolvement in the Tier 1 Pilot Lines NanoIC and FAMES\, supporting the EU Chips Act\, from initial \nnegotiations through to project kick-off and execution.\n\nInstrumental in the development of the 'Quantum 2030 National Strategy for Quantum Technologies'\, \nGiorgos continues to participate in its implementation group and chairs the activities of the \n‘National and International Collaboration’ Pillar\, supporting the strategy’s effective execution.\n\nGiorgos is a key contributor to major international strategic research and innovation agendas\, \nincluding the ECS-SRIA and IRDS. He has initiated several EU projects\, acting as Principal \nInvestigator on 18 occasions and as Coordinator on three. Notably\, he has led EU-funded \nprogrammes such as ASCENT+ and INFRACHIP\, which provided open access to infrastructure for \nearly-stage research on nanoelectronics and semiconductor chips\, and has overseen the ICOS-project\n activity on Technology Scanning and Foresight\, focused on international cooperation in semiconductors.\n\nHost Faculty: Prof. Gayathri Pillai
URL:https://www.cense.iisc.ac.in/event/seminar-gesn-a-group-iv-materials-platform-for-quantum-devices/
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20251114T113000
DTEND;TZID=Asia/Kolkata:20251114T123000
DTSTAMP:20260419T223049
CREATED:20251028T110242Z
LAST-MODIFIED:20251028T110357Z
UID:9497-1763119800-1763123400@www.cense.iisc.ac.in
SUMMARY:[Seminar] : Scanning SQUID on Lever  Probing Magnetism and Topology
DESCRIPTION:Speaker: Prof. Paritosh Karnatak\, Research Scientist at Basel.\n\nTitle: "Scanning SQUID on Lever  Probing Magnetism and Topology"\nDate: Friday\, November 14\, 2025 - Time: 11:30 AM\nHi-Tea & Coffee: 11 AM\n\nVenue: CeNSE Seminar Hall \n\nAbstract:\nA topological superconductor is a highly sought-after phase of matter that\, if realised\, \ncould enable topological quantum computation. I will present our attempts at engineering topological \nsuperconductivity in van der Waals materials [1–3] and discuss the challenges involved. In this \ncontext\, I will present scanning microscopy based on a superconducting quantum interference \ndevice (SQUID)\, which we implemented on commercial silicon cantilevers [4]. Such local \nprobes offer a powerful approach to investigate novel condensed matter phases and are \ncomplementary to quantum transport\, which only accesses average quantities. Our scanning \nSQUID microscope (SSM) offers multimode imaging (topography\, magne tometry\, and thermometry)\, \nand is operable until ∼ 1 T. Moreover\, with reliable sample-to-tip distance feedback (∼ 1 µm) it is robust \nunder typical scanning conditions\, making it a versatile probe for novel phenomena in topological materials\,\n magnetic systems\, and superconductors at the local scale (down to tens of nanometers) [5\, 6]. Using SSM\, we \ninvestigate the magnetic behavior of CrPS4\, a weakly anisotropic vdW in terlayer antiferromagnet. We find that \nat the monolayer limit CrPS4 shows no remanence and a zero coercive field\, unlike thicker odd layers that \nexhibit ∼ 50 mT coercivity and nearly 100% remanence. Layer-dependent studies reveal that interlayer coupling \nand dimensionality gov ern magnetic responses. These findings provide insight into mechanisms driving long-range \nmagnetic order in two-dimensions. Finally\, I will discuss our measurements in a magnetic topological insulator \nand outline plans for the future development of these probes. \n\nReferences 1D. I. Indolese\, P. Karnatak\, A. Kononov\, R. Delagrange\, R. Haller\, L. Wang\, P. Makk\, K. Watanabe\, \nT. Taniguchi\, and C. Schönenberger\, “Compact SQUID realized in a double-layer graphene heterostructure”\, \nNano letters 20\, 7129–7135 (2020). 2P. Karnatak\, Z. Mingazheva\, K. Watanabe\, T. Taniguchi\, H. Berger\, L. Forro\, \nand C. Scho nenberger\, “Origin of Subgap States in Normal-Insulator-Superconductor van der Waals Het erostructures”\, \nNano Lett 23\, 2454–2459 (2023). 1 3L. Veyrat\, C. Déprez\, A. Coissard\, X. Li\, F. Gay\, K. Watanabe\, T. Taniguchi\, \nZ. Han\, B. A. Piot\, H. Sellier\, et al.\, “Helical quantum hall phase in graphene on SrTiO3”\, Science 367\, 781 786 \n(2020). 4M. Wyss\, K. Bagani\, D. Jetter\, E. Marchiori\, A. Vervelaki\, B. Gross\, J. Ridderbos\, S. Gliga\, C. Schönenberger\, \nand M.Poggio\,“Magnetic\, thermal\, and topographic imaging with ananometer scale SQUID-On-Lever scanning probe”\, \nPhys. Rev. Appl. 17\, 034002 (2022). 5K. Bagani\, A. Vervelaki\, D. Jetter\, A. Devarakonda\, M. A. Tschudin\, et al.\, \n“Imaging strain controlled magnetic reversal in thin CrSBr”\, Nano Letters 24\, 13068–13074 (2024). 6E. Marchiori\, \nL. Ceccarelli\, N. Rossi\, G. Romagnoli\, J. Herrmann\, J.-C. Besse\, S. Krinner\, A. Wallraff\, and M. Poggio\, \n“Magnetic imaging of superconducting qubit devices with scanning SQUID-on-tip”\, Applied Physics Letters 121 (2022).\n\nBiography:\n\nParitosh earned a Bachelor’s and a Master’s degree in Physics at Indian Institute of Technology Kanpur. \nHe later obtained his Ph.D. in Physics from Indian Institute of Science Bangalore\, \nworking with Prof. Arindam Ghosh\, studying a wide range of phenomena in high mobility graphene devices.\n\nAfter completing his Ph.D.\, he pursued postdoctoral research at the University of Basel\, Switzerland \nworking on superconducting van der Waals materials. Currently\, Paritosh is a Research Scientist at \nBasel and employs scanning SQUID microscopy to study magnetic and topological materials.\n\n\nHost Faculty:  Prof. Chandan Kumar
URL:https://www.cense.iisc.ac.in/event/seminar-scanning-squid-on-lever-probing-magnetism-and-topology/
LOCATION:Seminar Hall – CeNSE
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20251120T143000
DTEND;TZID=Asia/Kolkata:20251120T153000
DTSTAMP:20260419T223049
CREATED:20251028T105924Z
LAST-MODIFIED:20251028T105924Z
UID:9494-1763649000-1763652600@www.cense.iisc.ac.in
SUMMARY:[Seminar] : Interfacial Dynamics from Droplets to Extended Thin Films
DESCRIPTION:Speaker: Prof. Monojit Chakraborty\, Assistant Professor\, Department of Chemical Engineering\, IIT Kharagpur.\n\nTitle: "Interfacial Dynamics from Droplets to Extended Thin Films"\n\nDate: Thursday\, November 20\, 2025 - Time: 2:30 PM\n\nHi-Tea & Coffee: 3:30 PM\n\nVenue: CeNSE Seminar Hall \n\nAbstract:\n\nFlows at small scales are fascinating due to their complex dynamics. This talk explores \ninterfacial phenomena at micro- and nanoscales\, covering topics from wetting and \nanisotropic droplet behaviour to evaporation dynamics and viscous effects in extended \nliquid thin films. It begins with experimental insights into water wetting on rose petals\, \nchallenging the conventional “impregnated Cassie-Baxter” model. The effect of crystallographic \norientation on substrate wetting will then be examined. The discussion continues with interfacial \ninstabilities during methanol evaporation on silicon\, forming “tears\,” and concludes with how bulk \nviscosity governs the evolution of highly viscous extended liquid thin films.\n\nBiography:\n\nMonojit Chakraborty is currently working as an Assistant Professor in the Department of Chemical \nEngineering at IIT Kharagpur. Prior to joining IIT Kharagpur\, he worked as a Postdoctoral Research \nAssociate at the School of Mechanical Engineering and Birck Nanotechnology Center\, at Purdue University\, \nUSA. He earned his PhD and Master’s from IIT Kharagpur. His research focuses on micro- and nanoscale systems\, \nincluding microfluidics\, microscale transport\, interfacial sciences\, molecular simulations\, and related areas. \nBeyond academia\, he has three years of industrial experience and has authored 35 publications in international peer-reviewed journals.\n\nHost Faculty:  Prof. Prosenjit Sen
URL:https://www.cense.iisc.ac.in/event/seminar-interfacial-dynamics-from-droplets-to-extended-thin-films/
LOCATION:Seminar Hall – CeNSE
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20251120T160000
DTEND;TZID=Asia/Kolkata:20251120T170000
DTSTAMP:20260419T223049
CREATED:20251107T054653Z
LAST-MODIFIED:20251107T054927Z
UID:9601-1763654400-1763658000@www.cense.iisc.ac.in
SUMMARY:[Seminar] : Memory Innovations Enabling AI Revolution and Growing Role of NAND Memory
DESCRIPTION:Speaker 1: Dr. Chandra Mouli\, Vice President of Device Technology R&D in Micron Technology Inc\,.\n\nSpeaker 2: Dr. Shyam Raghunathan\, Head of Micron India Research Centre.\n\nTitle 1: "Memory Innovations Enabling AI Revolution"\n\nTitle 2: "Growing Role of NAND Memory"\n\nDate: Thursday\, November 20\, 2025 - Time: 4 PM\n\nHi-Tea & Coffee: 5 PM\n\nVenue: CeNSE Seminar Hall \n\nAbstract 1:\n\nMemory technology is in the center of rapid advancements in AI\, enabling advanced hardware platforms.\n In this talk we will focus on two key technologies - DRAM and NAND\, and their evolution to meet \nthe growing needs in training and inference systems. As both these technologies scale down to \nfundamental limits\, we will provide a perspective on the importance of 3D structures\, heterogenous \nintegration\, and system-level optimizations that are needed to meet the power and performance \nchallenges.\n\nAbstract 2:\n\nThis talk delves into the expanding role of NAND solutions in the AI and electric vehicle (EV) era\, \nemphasizing how innovations in both architecture and technology are enabling a roadmap for continued \nNAND scaling well into the next decade. Alongside traditional NAND solutions that continue to support \nexplosive data growth\, emerging applications are driving the need for accelerated scaling and enhanced \npower performance efficiency across generations. The presentation begins with a historical overview of \nNAND scaling\, tracing the evolution from 2D NAND to 3D NAND and the motivations behind this transition. \nIt then highlights key advancements over the past decade in 3D NAND\, including architectural \nbreakthroughs\, wordline stacking\, and tier pitch scaling—alongside the challenges they present. \nLooking ahead\, the talk explores next-generation solutions such as channel engineering\, \nconfined storage-node cells\, ferroelectric NAND\, disruptive XY scaling techniques\, and wafer-to-wafer \nbonding. Finally\, a forward-looking roadmap outlines how innovations in architecture\, cell design\, \nand X-Y-Z scaling will shape the future of high-density\, high-performance NAND technologies \nover the coming decade.\n\nBiography 1:\n\nDr. Chandra Mouli is currently Vice President of Device Technology R&D in Micron Technology Inc\, \nwith responsibilities in various areas of device and process modeling\, electrical characterization\, \nreliability analysis\, and related areas. He graduated from the ECE dept in IISc and obtained Ph.D \nfrom the University of Texas at Austin. He has >600 patents covering a wide area of device & process \ntechnology\, image sensors\, memory cells and interconnects. He is currently in the scientific advisory \nboard of IMEC\, a semiconductor research consortium based in Belgium\, and various other organizations \nincluding IEEE.\n\nBiography 2:\n\nDr. Shyam Raghunathan earned his Bachelor's degree from BITS Pilani\, India\, and Master's and Ph.D. \ndegrees from Stanford University\, USA\, all in Electrical Engineering. His professional career \nbegan at Intel in 2010 on NAND technology development with Micron. He currently leads NAND device\narray engineering with teams in Hyderabad\, Boise and Singapore. In 2025\, he became the head of \nMicron India Research Center (MIRC) to drive advanced R&D in India. He has made key contributions \nin nine generations of NAND flash products and received several awards. He has presented and served\nin several conferences including IEDM\, has more than 30 US patents and currently editor of IEEE TED.\n\nHost Faculty:  Prof. Navakanta Bhat.
URL:https://www.cense.iisc.ac.in/event/seminar-memory-innovations-enabling-ai-revolution-and-growing-role-of-nand-memory/
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20251121T160000
DTEND;TZID=Asia/Kolkata:20251121T170000
DTSTAMP:20260419T223049
CREATED:20251118T090855Z
LAST-MODIFIED:20251118T090855Z
UID:9679-1763740800-1763744400@www.cense.iisc.ac.in
SUMMARY:[Thesis Colloquium] : Custom Circuit Design for MEMS Devices
DESCRIPTION:Thesis Title: "Custom Circuit Design for MEMS Devices "\n\nName of the Student: Ms. Disha Chugh\n\nAdvisor: Prof. Saurabh Chandorkar\, CeNSE\n\nDate: 21st November 2025\, (Friday)\, 4 PM\n\nVenue: Seminar Hall (Hybrid): \n\nAbstract\n\nMicro-Electro-Mechanical Systems (MEMS) find applications in various domains\, including inertial sensors\, \nmicrofluidic devices\, RF systems\, and optical applications. Depending on the desired application\, these \ndevices can be operated in resonant or non-resonant modes and transduced through methods such as electrostatic\, \nelectrothermal\, magnetostatic\, piezoelectric\, or piezoresistive mechanisms. Achieving the desired operation \nfor a specific application requires designing peripheral circuitry around these devices. In this context\, \nunderstanding both the device's actual operation and its accurate electrical equivalent is essential for \ndesigning application-specific circuits\, as it allows us to treat the MEMS device and electrical circuit \nas a unified system.\n\nResonant MEMS\, typically modeled as second-order systems\, are conventionally represented using R-L-C equivalents\, \nsuch as the Butterworth-Van Dyke (BVD)\, Mason\, or transformer-based models. However\, we argue that though \nthese models do find application in circuit design\, they are not deal for designing peripheral circuitry. \nWe highlight the limitations of using passive elements like R\, L\, and C to describe the electrical equivalent \nof capacitive MEMS devices and emphasize their non-transmission-type nature. We revisit the assumptions \nunderlying these mathematical models and propose a new mathematical framework for capacitive MEMS devices. \nUsing this framework\, we derive a new electrical equivalent that better aligns with the device's physical behavior.\n\nTo validate the new mathematical model\, we demonstrate its applicability for a standard circuit for sensing \ncapacitively transduced signals viz. Transimpedance Amplifier (TIA). Through the lens of the new model\, \nwe identify shortcomings of the TIA circuit and develop a novel measurement methodology that measures \nvoltage of a floating sense electrode. We address the major challenge of stable continuous voltage \nsensing at electrically floating sense terminals that arise due to accumulation of stray charges by \nintroducing a control electrode. This Voltage Amplification (VA) methodology outperforms TIA circuits \nbuilt with same underlying amplifying element (OPAMP) in terms of robustness to input parasitic capacitance\, \nbandwidth\, and noise performance. Moreover\, we demonstrate that the noise performance of a combined \nsystem (resonator and sensing unit) calculated using the new model matches the experimentally observed \nresults\, a consistency that was previously unattainable with conventional models.\n\nThe newly developed equivalent circuit enables parameter estimation directly from measurements\, \neliminating the need for curve fitting. Simulating this equivalent circuit across a broadband frequency \nrange shows excellent agreement with experimental measurements. The key distinction of our model is its \nfoundation in physical parameters rather than purely empirical fits. Using this new perspective and \nelectrical equivalent\, we demonstrate that capacitive MEMS devices can achieve a voltage gain and \noperate with minimal or no sensing circuitry\, depending on the application.\n\nAdditionally\, we provide insights into the sources of feedthrough capacitance in epi-sealed devices\, \nquantify contributions from various sources\, and present a general methodology to estimate feedthrough \ncapacitance in other MEMS devices. Furthermore\, we propose innovative methods to minimize feedthrough \ncapacitance without introducing excessive noise\, including the use of split electrodes instead of full \nelectrodes for actuation and sensing.\n\nThis work provides a comprehensive framework for understanding and designing peripheral circuitry \naround capacitive MEMS\, offering solutions that provide more intuition and better understanding of \nthe combined system of a MEMS resonator and its sensing unit.
URL:https://www.cense.iisc.ac.in/event/thesis-colloquium-custom-circuit-design-for-mems-devices/
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20251124T090000
DTEND;TZID=Asia/Kolkata:20251202T170000
DTSTAMP:20260419T223049
CREATED:20250730T105504Z
LAST-MODIFIED:20250730T105504Z
UID:8763-1763974800-1764694800@www.cense.iisc.ac.in
SUMMARY:Advanced Training Program on Semiconductor Fabrication & Characterization
DESCRIPTION:
URL:https://www.cense.iisc.ac.in/event/advanced-training-program-on-semiconductor-fabrication-characterization-7/
LOCATION:CeNSE\, IISc\, Bengaluru
END:VEVENT
END:VCALENDAR