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Saptarsi Das

Research Area


  • Saptarsi Das, Kavitha Madhu, Madhav Krishna, Nalesh S., S.K. Nandy, Ranjani Narayan, “A Framework for Post-Silicon Realization of Arbitrary Instruction Extensions on Reconfigurable Data-paths?, Journal of System Architectures, Elsevier, 2014.
  • Saptarsi Das, R Narayan, S. K. Nandy, “Accelerating Reduction for Enabling Fast Multiplication over Large Binary Fields”, Lecture Notes on Computer Science, Springer, 2012.
  • Ganesh Garga, Saptarsi Das, S. K. Nandy, R Narayan, C Haldar, MP Jagtap, S. P. Dash, “A Flexible Crypto-system Based upon the REDEFINE Polymorphic ASIC Architecture”, Defence Science Journal, 2012.
  • Mythri Alle, Keshavan Varadarajan, Alexander Fell, Nimmy Joseph, Saptarsi Das, Prasenjit Biswas, Jugantor Chetia, Adarsh Rao, SK Nandy, Ranjani Narayan, “REDEFINE: Runtime Reconfigurable Polymorphic ASIC”, ACM Transactions on Embedded Computing Systems, 2009.
  • R. Krishnamoorthy, Saptarsi Das, K. Varadarajan, M. Alle, M. Fujita, S. K. Nandy, “Data Flow Graph Partitioning Algorithms and Their Evaluations for Optimal Spatio-temporal Computation on a Coarse Grain Reconfigurable Architecture”, IPSJ transactions on system LSI design methodology, 2011.