Loading Events

« All Events

[Seminar] : Engineering Dielectric Interfaces in Nanoscale Transistors

September 23 @ 4:00 pm - 5:00 pm
Speaker: Prof. Dipanjan Sen, Postdoctoral Associate, Research Laboratory of Electronics (RLE), Massachusetts Institute of Technology (MIT).

Title: "Engineering Dielectric Interfaces in Nanoscale Transistors"

Date: Wednesday, 23rd September 2026 - Time: 4 PM

Hi-Tea & Coffee: 5 PM

Venue: CeNSE Seminar Hall

Abstract:

As scaling enters the Ångström era, the frontier is shifting from the semiconductor channel toward 
the dielectric and its interfaces. In atomically thin systems, channel-dielectric coupling becomes 
strong enough to define device behavior. This talk shows how that coupling in 2D heterostructures 
enables cryogenic non-volatile ferroelectric memory, programmable threshold-voltage engineering for 
low-power 2D CMOS, solid-state iontronic thermometry, and neuromorphic photon–ion–electron-coupled devices. 
Extending the same philosophy to mainstream CMOS scaling, ultrathin ALD-grown HfO2–ZrO2 gate stacks 
engineered near the atomic limit enhance gate capacitance and scale equivalent oxide thickness beyond 
conventional interfacial-layer limits, while preserving transport, leakage, and reliability. 
Dielectrics thus emerge as active materials, motivating a forward-looking program on atomically 
engineered gate stacks for CMOS and beyond-CMOS devices.

Biography:

Dipanjan Sen is a Postdoctoral Associate in the Research Laboratory of Electronics (RLE) at 
the Massachusetts Institute of Technology, where he works with Prof. Suraj Cheema on gate-stack 
engineering for CMOS and beyond CMOS devices. His current research focuses on extreme EOT scaling 
through ultrathin, ALD-grown gate stacks and their integration into foundry-relevant platforms. 
He earned his PhD at the Pennsylvania State University in the group of Prof. Saptarshi Das, where 
his work on 2D-material/dielectric interfaces produced a broad family of emerging devices spanning 
cryogenic ferroelectric memory, threshold-voltage engineering for 2D CMOS, iontronic sensing, and 
neuromorphic computing, with results appearing in journals including Nature Electronics, Nature 
Communications, Nature Sensors, ACS nano etc. Across his work, Dipanjan is driven by a single 
question- how the engineering of dielectric interfaces, atom by atom, can unlock new functionality 
and extend the limits of the modern transistor.

Host Faculty:  Prof. Manoj Varma

Details

  • Date: September 23
  • Time:
    4:00 pm - 5:00 pm