Speaker 1: Dr. Chandra Mouli, Vice President of Device Technology R&D in Micron Technology Inc,.

Speaker 2: Dr. Shyam Raghunathan, Head of Micron India Research Centre.

Title 1: "Memory Innovations Enabling AI Revolution"

Title 2: "Growing Role of NAND Memory"

Date: Thursday, November 20, 2025 - Time: 4 PM

Hi-Tea & Coffee: 5 PM

Venue: CeNSE Seminar Hall 

Abstract 1:

Memory technology is in the center of rapid advancements in AI, enabling advanced hardware platforms.
 In this talk we will focus on two key technologies - DRAM and NAND, and their evolution to meet 
the growing needs in training and inference systems. As both these technologies scale down to 
fundamental limits, we will provide a perspective on the importance of 3D structures, heterogenous 
integration, and system-level optimizations that are needed to meet the power and performance 
challenges.

Abstract 2:

This talk delves into the expanding role of NAND solutions in the AI and electric vehicle (EV) era, 
emphasizing how innovations in both architecture and technology are enabling a roadmap for continued 
NAND scaling well into the next decade. Alongside traditional NAND solutions that continue to support 
explosive data growth, emerging applications are driving the need for accelerated scaling and enhanced 
power performance efficiency across generations. The presentation begins with a historical overview of 
NAND scaling, tracing the evolution from 2D NAND to 3D NAND and the motivations behind this transition. 
It then highlights key advancements over the past decade in 3D NAND, including architectural 
breakthroughs, wordline stacking, and tier pitch scaling—alongside the challenges they present. 
Looking ahead, the talk explores next-generation solutions such as channel engineering, 
confined storage-node cells, ferroelectric NAND, disruptive XY scaling techniques, and wafer-to-wafer 
bonding. Finally, a forward-looking roadmap outlines how innovations in architecture, cell design, 
and X-Y-Z scaling will shape the future of high-density, high-performance NAND technologies 
over the coming decade.

Biography 1:

Dr. Chandra Mouli is currently Vice President of Device Technology R&D in Micron Technology Inc, 
with responsibilities in various areas of device and process modeling, electrical characterization, 
reliability analysis, and related areas. He graduated from the ECE dept in IISc and obtained Ph.D 
from the University of Texas at Austin. He has >600 patents covering a wide area of device & process 
technology, image sensors, memory cells and interconnects. He is currently in the scientific advisory 
board of IMEC, a semiconductor research consortium based in Belgium, and various other organizations 
including IEEE.

Biography 2:

Dr. Shyam Raghunathan earned his Bachelor's degree from BITS Pilani, India, and Master's and Ph.D. 
degrees from Stanford University, USA, all in Electrical Engineering. His professional career 
began at Intel in 2010 on NAND technology development with Micron. He currently leads NAND device
array engineering with teams in Hyderabad, Boise and Singapore. In 2025, he became the head of 
Micron India Research Center (MIRC) to drive advanced R&D in India. He has made key contributions 
in nine generations of NAND flash products and received several awards. He has presented and served
in several conferences including IEDM, has more than 30 US patents and currently editor of IEEE TED.

Host Faculty:  Prof. Navakanta Bhat.