Thesis Title: "Development and Study of HEMTs on Buffer-Free GaN-on-SiC for High Power Radio-Frequency Applications"

Name of the Student: Mr. Amit Bansal

Degree Registered: Ph.D. Engineering 

Advisors: Prof. Digbijoy Nath CeNSE

Date: 27th March 2026, (Friday), 4 PM

Venue : CeNSE Seminar Hall 

Abstract:

Wide bandgap semiconductors like Gallium Nitride (GaN) based high electron mobility 
transistors (HEMTs) hold great promise for high frequency power applications thanks 
to the material properties of higher saturation velocity and breakdown voltage when 
compared to the traditional semiconductors. GaN-on-SiC stacks have lower dislocation 
density, higher themal conductivity and higher electrical resitivity as compared to 
GaN-on-Si stacks. Conventionally, thick doped buffer layers are required to relax 
strain arising due to lattice mismatch between substrate and GaN, and reduce the 
dislocation density. However, intentional dopants act as trapping centers for electrons 
resulting in current collapse, and reduction in power added efficiency. An alternate 
approach uses buffer-free stack with AlN acting as the back barrier. 

To validate the opportunity presented by buffer-free GaN-on-SiC HEMTs, baseline 
performance was optimized using ex-situ MOCVD SiN as gate dielectric. The MISHEMTs 
exhibited higher 2DEG and reduced gate lag 4-6 %. Finally, under 28 V Class B pulsed 
operation for C-band and X-band, record output power in buffer-free stacks was obtained 
for 0.1 mm periphery devices. Drain current transient studies were also performed to 
determine the nature of trap signatures on buffer-free devices. In a device without 
any gate dielectric, a surface trap with trap activation energy of 0.68 eV was identified. 
On the other hand, a device with thin gate dielectric was able to suppress the surface 
trap states and instead hinted at localized epitaxial defects.

Next, 8-finger MISHEMTs based on T-gate with slanted mini-field plates architecture 
and air-bridges were fabricated to boost the performance. To fabricate the T-gate, a 
recipe combining dry etch and wet etch was developed to selectively etch PECVD SiN 
without adversely impacting MOCVD SiN. A lower drain lag was obtained for T-gate HEMT 
as compared in rectangular gates due to better electric field management. T-gate device 
reported more linear power gain with 5.1 W/mm power, almost twice that of a rectangular device.

Finally, a systemic study was undertaken to investigate the impact of varying unit 
gate width and number of fingers on performance of HEMTs. 2 finger devices reported 
higher drain current density which gradually declined for multi-finger devices by as 
much as 31 % due to self-heating effect, but a lower decline of 13 % was seen for pulsed 
measurements. For 25 V bias Class AB operation at 6 GHz, record output power of 9.3 W and
 5.5 W respectively were measured under pulsed loadpull conditions for 8×125 μm and 12×125 μm.

To summarise, HEMT performance was optimized for buffer-free GaN-on-SiC using ex-situ MOCVD SiN 
as gate dielelectric and T-gate architecture, and multi-finger HEMTs were demonstrated to 
deliver high-power for RF applications