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Analog CMOS Performance Degradation due to Edge Direct Tunneling (EDT) Current in sub-100nm Technology

TitleAnalog CMOS Performance Degradation due to Edge Direct Tunneling (EDT) Current in sub-100nm Technology
Publication TypeJournal Article
Year of Publication2003
AuthorsBhat, N, Thakur, CS
JournalJournal of Semiconductor Technology and Science
Date Publishedsep
Research Area: