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Study of TaN-gated p-GaN E-mode HEMT

TitleStudy of TaN-gated p-GaN E-mode HEMT
Publication TypeJournal Article
Year of Publication2023
AuthorsBaby, R, Reshma, K, Chandrasekar, H, Muralidharan, R, Raghavan, S, Nath, DN
JournalIEEE Transactions on Electron Devices
Volume70
Pagination1607–1612
KeywordsAluminum gallium nitride, gate leakage, HEMTs, logic gates, Metals, Threshold voltage, wide band gap semiconductors
Abstract

We report on the study of tantalum nitride (TaN) gate-stack on p-GaN-based e-mode high electron mobility transistor (HEMT) on silicon. Besides offering an excellent etch selectivity of >1:30 over p-GaN under Cl2/O2/Ar-based dry etch, which is promising for self-aligned gate etch process, TaN-gated HEMTs exhibited three orders of lower forward gate leakage than reference devices with Ti/Au gate-stack. At 150 °C, the forward gate leakage was still found to be about 60 μA /mm at VG= 8 V. The threshold voltage ( Vth ) defined at 1 mA/mm was found to be 2.4 V for the TaN-based HEMTs. The gate Schottky barrier height was estimated to be about 1–1.5 eV higher than that for Ti/Au gate over a temperature range of 50–300 K as extracted from the gate leakage fit to Fowler–Nordheim (FN) tunneling. The effect of drain and forward gate bias stress on the dynamic ON-resistance recovery and Vth instability was studied. TaN-gated devices exhibited a Vth shift of 2%, while for the Ti/Au counterparts, it was about 10%–15% when subjected to an identical gate–drain forward stress, indicating that TaN is an attractive gate-stack for p-GaN e-mode HEMTs.

DOI10.1109/TED.2023.3241132