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Publications

Found 363 results
Author Title Type [ Year(Asc)]
Filters: First Letter Of Last Name is B  [Clear All Filters]
2007
B. Sheldon, Bhandari, A. , Bower, A. , Raghavan, S. , and Redwing, J. M. , “Steady State Tensile Stresses During Growth of Polycrystalline Films”, Acta. Materialia, 2007.
B. Sheldon, Bhandari, A. , Bower, A. , Raghavan, S. , and Redwing, J. M. , “Steady State Tensile Stresses During Growth of Polycrystalline Films”, Acta. Materialia, 2007.
2006
B. P. Harish, Bhat, N. , and Patil, M. B. , “Analytical modeling of CMOS circuit delay distribution due to concurrent variations in multiple processes”, Solid State Electronics, vol. 50, pp. 1252-1260, 2006.
A. Naik, Buu, O. , LaHaye, M. D. , Armour, A. D. , Clerk, A. A. , Blencowe, M. P. , and Schwab, K. C. , “Cooling a nanomechanical resonator with quantum back-action”, Nature, vol. 443, pp. 193-196, 2006.
A. Naik, Buu, O. , LaHaye, M. D. , Armour, A. D. , Clerk, A. A. , Blencowe, M. P. , and Schwab, K. C. , “Cooling a nanomechanical resonator with quantum back-action”, Nature, vol. 443, pp. 193-196, 2006.
R. Sreenivasan and Bhat, N. , “Effect of Gate-Drain/Source Overlap on the noise in 90nm NMOSFETs”, Journal of Applied Physics, 2006.
M. P. Singh, Shalini, K. , Shivashankar, S. A. , Deepak, G. C. , and Bhat, N. , “Structural and electrical properties of low pressure metalorganic chemical vapor deposition grown Eu2O3 films on Si(100)”, Applied Physics Letters, vol. 89. p. 201901, 2006.
2005
A. Gupta and Bhat, N. , “Asymmetric Cross-Coupled Differential Pair Configuration to Realize Neuron Activation Function and its Derivative”, IEEE Transactions on Circuits and Systems Part II: Express Briefs, vol. 52, pp. 10–13, 2005.
H. C. Srinivasaiah and Bhat, N. , “Characterization of Sub-100nm CMOS Process Using Screening Experiment Technique”, Solid State Electronics, vol. 49, pp. 431-436, 2005.
R. Srinivasan and Bhat, N. , “Impact of channel engineering on unity gain frequency and noise-figure in 90nm NMOS transistor for RF applications”, in 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design, 2005, pp. 392-396.
B. P. Harish, Patil, M. B. , and Bhat, N. , “Modeling of the Effects of Process Variations on Circuit Delay at 65nm”, in 2005 IEEE Conference on Electron Devices and Solid-State Circuits, 2005, pp. 761-764.
A. Gupta and Bhat, N. , “On the Performance Analysis of a Class of Neuron Circuits”, Analog Integrated Circuits and Signal Processing, vol. 44, pp. 293–302, 2005.
R. Srinivasan and Bhat, N. , “Scaling Characteristics of fNQS and ft in NMOSFETs with and without Supply Voltage Scaling”, Journal of the Indian Institute of Science, vol. 85, 2005.
R. Srinivasan and Bhat, N. , “Scaling Characteristics of fNQS and ft in NMOSFETs with Uniform and Non-uniform Channel Doping”, International Journal of Electronics, vol. 92, 2005.
T. Srinivasan, Singh, S. N. , Tiwari, U. , Sharma, R. K. , Muralidharan, R. , Rao, D. V. Sridhar, Balamuralikrishnan, R. , and Muraleedharan, K. , “Structural and photoluminescence characteristics of molecular beam epitaxy-grown vertically aligned In0.33Ga0.67As/GaAs quantum dots”, Journal of Crystal Growth, vol. 280, 2005.
C. Venkatesh, Patil, S. , Bhat, N. , and Pratap, R. , “A Torsional MEMS Varactor with Wide Dynamic Range and Low Actuation Voltage”, Sensors and Actuators A: Physical, vol. 121, 2005.
2004
A. Gupta and Bhat, N. , “Back-Gate Effect to Generate Derivative of Neuron Activation Function”, Analog Integrated Circuits and Signal Processing, vol. 41, pp. 89–92, 2004.
K. Maitra and Bhat, N. , “Impact of Gate to Source/Drain Overlap Length on 80 nm CMOS Circuit Performance”, IEEE Transactions on Electron Devices, pp. 409–414, 2004.
N. Bhat, “MEMS for RF Applications”, IETE Technical Review, vol. 21, 2004.
R. Singh and Bhat, N. , “An Offset Compensation Technique for Latch Type Sense Amplifier in High Speed Low Power SRAMs”, IEEE Transactions on VLSI Systems, pp. 652–657, 2004.
M. P. Singh, Thakur, C. S. , Shalini, K. , Banerjee, S. , Bhat, N. , and Shivashankar, S. A. , “Structural, Optical, and Electrical Characterization of Gadolinium Oxide Films Deposited by Low-pressure Metalorganic Chemical Vapour Deposition”, Journal of Applied Physics, vol. 96, pp. 5631–5637, 2004.
M. P. Singh, Thakur, C. S. , Shalini, K. , Banerjee, S. , Bhat, N. , and Shivashankar, S. A. , “Structural, Optical, and Electrical Characterization of Gadolinium Oxide Films Deposited by Low-pressure Metalorganic Chemical Vapour Deposition”, Journal of Applied Physics, vol. 96, pp. 5631–5637, 2004.
2003
N. Bhat and Thakur, C. S. , “Analog CMOS Performance Degradation due to Edge Direct Tunneling (EDT) Current in sub-100nm Technology”, Journal of Semiconductor Technology and Science, 2003.
K. Maitra and Bhat, N. , “Analytical approach to integrate the different components of direct tunneling current through ultrathin gate oxides in n-channel metal oxide semiconductor field-effect transistors”, Journal of Applied Physics, vol. 93, pp. 1064–1068, 2003.
H. C. Srinivasaiah and Bhat, N. , “Mixed Mode Simulation Approach to Characterize the Circuit Delay Sensitivity to Implant Dose Variations”, IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, vol. 22, pp. 742–747, 2003.

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